The present invention relates to a technology for stopping the bus of a module in a semiconductor integrated circuit apparatus. In particular, the invention relates to an effective technology for stopping the bus of a module to perform power saving control.
Technologies for reducing power consumption of semiconductor integrated circuit apparatuses, such as systems-on-chip (SoCs), which are widely used in mobile terminals and the like are becoming essential.
To perform power management control for power saving, a semiconductor integrated circuit apparatus of this type may cause a target module to stop using the bus, that is, may stop the bus of a module.
Such bus stop is performed by a bus stop control unit before performing power management control. For example, a handshake is performed by transmitting bus stop request signals to bus master modules (e.g., CPUs) and receiving bus stop completion signals from the bus master modules.
Upon receipt of the bus stop request signal from the bus stop control unit, each bus master module completes all bus transactions (bus requests) issued by the bus master module and then issues a bus stop completion signal. Upon receipt of the bus stop completion signals from all the bus master modules on which stop control is to be performed, the bus stop control unit issues a bus stop completion signal to a power management control unit.
Examples of this type of bus stop control technology for power saving include one which reduces power consumption of an entire computer system by dynamically stopping the bus clock or reducing the frequency thereof during operation of the computer system (Japanese Unexamined Patent Application Publication No. 2002-7316), one which gives a bus request to an arbiter in response to a determination for moving to power saving mode and disables a clock given to a bus master associated with the arbiter in response to the bus request (Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2006-508409), and one where a master controller changes the correspondence between a bus request made by a selector and an arbitration sequencer of each priority in accordance with the value of a register (Japanese Unexamined Patent Application Publication No. 2000-215157).